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sn74lvc2g34 sces359j ? august 2001 ? revised october 2015 sn74lvc2g34 dual buffer gate 1 features 3 description the sn74lvc2g34 device is a dual buffer gate 1 ? available in the texas instruments designed for 1.65-v to 5.5-v v cc operation. the nanofree ? package sn74lvc2g34 device performs the boolean function ? supports 5.5-v v cc operation y = a in positive logic. ? inputs accept voltages to 5.5 v nanofree package technology is a major ? maximum t pd of 4.1 ns at 3.3 v breakthrough in ic packaging concepts, using the die ? low power consumption, 10- a maximum i cc as the package. ? 24-ma output drive at 3.3 v this device is fully specified for partial-power-down applications using i off . the i off circuitry disables the ? typical v olp (output ground bounce) outputs, preventing damaging current backflow < 0.8 v at v cc = 3.3 v, t a = 25 c through the device when it is powered down. ? typical v ohv (output v oh undershoot) > 2 v at v cc = 3.3 v, t a = 25 c device information (1) ? i off supports live insertion, partial-power-down part number package body size (nom) mode, and back-drive protection sn74lvc2g34dbv sot-23 (6) 2.90 mm 1.60 mm ? can be used as a down translator to translate sn74lvc2g34dck sc70 (6) 2.00 mm 1.25 mm inputs from a maximum of 5.5 v down to the v cc sn74lvc2g34drl sot (6) 1.60 mm 1.20 mm level sn74lvc2g34yzp dsbga (6) 1.41 mm 0.91 mm ? latch-up performance exceeds 100 ma per (1) for all available packages, see the orderable addendum at jesd 78, class ii the end of the data sheet. ? esd protection exceeds jesd 22 simplified schematic ? 2000-v human body model (a114-a) ? 200-v machine model (a115-a) ? 1000-v charged-device model (c101) 2 applications ? av receivers ? audio docks: portable ? blu-ray player and home theaters ? dvd recorders and players ? embedded pcs ? mp3 players and recorders (portable audio) ? personal digital assistant (pda) ? power: telecom/server ac/dc supply: single controller: analog and digital ? solid-state drive (ssd): client and enterprise ? tv: lcd/digital and high-definition (hdtv) ? tablets: enterprise ? video analytics: servers ? wireless headsets, keyboards, and mice 1 an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. productfolder 1a 1y 1 6 2a 2y 3 4 support &community tools & software technical documents sample &buy
sn74lvc2g34 sces359j ? august 2001 ? revised october 2015 www.ti.com table of contents 8.2 functional block diagram ......................................... 8 1 features .................................................................. 1 8.3 feature description ................................................... 8 2 applications ........................................................... 1 8.4 device functional modes .......................................... 8 3 description ............................................................. 1 9 application and implementation .......................... 9 4 revision history ..................................................... 2 9.1 application information .............................................. 9 5 pin configuration and functions ......................... 3 9.2 typical application ................................................... 9 6 specifications ......................................................... 3 10 power supply recommendations ..................... 10 6.1 absolute maximum ratings ..................................... 3 11 layout ................................................................... 10 6.2 esd ratings .............................................................. 4 11.1 layout guidelines ................................................. 10 6.3 recommended operating conditions ...................... 4 11.2 layout example .................................................... 10 6.4 thermal information .................................................. 4 12 device and documentation support ................. 11 6.5 electrical characteristics ........................................... 5 12.1 documentation support ........................................ 11 6.6 switching characteristics .......................................... 5 12.2 community resources .......................................... 11 6.7 operating characteristics .......................................... 5 12.3 trademarks ........................................................... 11 6.8 typical characteristics .............................................. 6 12.4 electrostatic discharge caution ............................ 11 7 parameter measurement information .................. 7 12.5 glossary ................................................................ 11 8 detailed description .............................................. 8 13 mechanical, packaging, and orderable 8.1 overview ................................................................... 8 information ........................................................... 11 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision i (december 2013) to revision j page ? added applications , device information table, pin configuration and functions section, esd ratings table, thermal information table, typical characteristics section, feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section, device and documentation support section, and mechanical, packaging, and orderable information section ..................................... 1 ? deleted part number from switching characteristics table headers. ..................................................................................... 5 changes from revision h (february 2007) to revision i page ? updated document to new ti data sheet format. ................................................................................................................... 1 ? removed ordering information table. .................................................................................................................................... 1 ? updated features section ...................................................................................................................................................... 1 ? updated operating temperature range. .................................................................................................................................. 4 2 submit documentation feedback copyright ? 2001 ? 2015, texas instruments incorporated product folder links: sn74lvc2g34
sn74lvc2g34 www.ti.com sces359j ? august 2001 ? revised october 2015 5 pin configuration and functions dbv package dck package 6-pin sot-23 6-pin sc70 top view top view yzp package 6-pin dsbga bottom view drl package 6-pin sot top view pin functions (1) pin i/o description name no. 1a 1 i buffer input 1 1y 6 o buffer output 1 2a 3 i buffer input 2 2y 4 o buffer output 2 gnd 2 ? ground pin v cc 5 ? power pin (1) see mechanical drawings for dimensions. 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit v cc supply voltage ? 0.5 6.5 v v i input voltage (2) ? 0.5 6.5 v v o voltage applied to any output in the high-impedance or power-off state (2) ? 0.5 6.5 v v o voltage applied to any output in the high or low state (2) (3) ? 0.5 v cc + 0.5 v i ik input clamp current v i < 0 ? 50 ma i ok output clamp current v o < 0 ? 50 ma i o continuous output current 50 ma continuous current through v cc or gnd 100 ma t j junction temperature 150 c t stg storage temperature ? 65 150 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) the input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) the value of v cc is provided in the recommended operating conditions table. copyright ? 2001 ? 2015, texas instruments incorporated submit documentation feedback 3 product folder links: sn74lvc2g34 1a 2a 1y 2y gnd 1 4 2 3 6 5 v cc 3 2 4 6 1 1a 1y 2y gnd 2a v cc 5 3 2 4 6 1 1a 1y 2y gnd 2a v cc 5 3 2 4 6 1 1a 1y 2y gnd 2a v cc 5
sn74lvc2g34 sces359j ? august 2001 ? revised october 2015 www.ti.com 6.2 esd ratings value unit human body model (hbm), per ansi/esda/jedec js-001, all pins (1) 2500 electrostatic v (esd) v discharge charged-device model (cdm), per jedec specification jesd22-c101, all pins (2) 1500 (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.3 recommended operating conditions (1) min max unit operating 1.65 5.5 v cc supply voltage v data retention only 1.5 v cc = 1.65 v to 1.95 v 0.65 v cc v cc = 2.3 v to 2.7 v 1.7 v ih high-level input voltage v v cc = 3 v to 3.6 v 2 v cc = 4.5 v to 5.5 v 0.7 v cc v cc = 1.65 v to 1.95 v 0.35 v cc v cc = 2.3 v to 2.7 v 0.7 v il low-level input voltage v v cc = 3 v to 3.6 v 0.8 v cc = 4.5 v to 5.5 v 0.3 v cc v i input voltage 0 5.5 v v o output voltage 0 v cc v v cc = 1.65 v ? 4 v cc = 2.3 v ? 8 i oh high-level output current ? 16 ma v cc = 3 v ? 24 v cc = 4.5 v ? 32 v cc = 1.65 v 4 v cc = 2.3 v 8 i ol low-level output current 16 ma v cc = 3 v 24 v cc = 4.5 v 32 v cc = 1.8 v 0.15 v, 2.5 v 0.2 v 20 t/ v input transition rise or fall rate v cc = 3.3 v 0.3 v 10 ns/v v cc = 5 v 0.5 v 5 dbv, dck, drl package ? 40 125 t a operating free-air temperature c yzp package -40 85 (1) all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, semiconductor and implications of slow or floating cmos inputs , scba004 . 6.4 thermal information sn74lvc2g34 thermal metric (1) dbv (sot-23) dck (sc70) drl (sot) yzp (dsbga) unit 6 pins 6 pins 6 pins 6 pins r ja junction-to-ambient thermal resistance 165 259 142 123 c/w (1) for more information about traditional and new thermal metrics, see the ic package thermal metrics application report, spra953 . 4 submit documentation feedback copyright ? 2001 ? 2015, texas instruments incorporated product folder links: sn74lvc2g34
sn74lvc2g34 www.ti.com sces359j ? august 2001 ? revised october 2015 6.5 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc min typ (1) max unit i oh = ? 100 a 1.65 v to 5.5 v v cc ? 0.1 i oh = ? 4 ma 1.65 v 1.2 i oh = ? 8 ma 2.3 v 1.9 v oh v i oh = ? 16 ma 2.4 3 v i oh = ? 24 ma 2.3 i oh = ? 32 ma 4.5 v 3.8 i ol = 100 a 1.65 v to 5.5 v 0.1 i ol = 4 ma 1.65 v 0.45 i ol = 8 ma 2.3 v 0.3 v ol v i ol = 16 ma 0.4 3 v i ol = 24 ma 0.55 i ol = 32 ma 4.5 v 0.55 i i a inputs v i = 5.5 v or gnd 0 to 5.5 v 5 a i off v i or v o = 5.5 v 0 10 a i cc v i = 5.5 v or gnd, i o = 0 1.65 v to 5.5 v 10 a one input at v cc ? 0.6 v, i cc 3 v to 5.5 v 500 a other inputs at v cc or gnd c i v i = v cc or gnd 3.3 v 3.5 pf (1) all typical values are at v cc = 3.3 v, t a = 25 c. 6.6 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see figure 2 ) from to operating free-air parameter v cc min max unit (input) (output) temperature (t a ) v cc = 1.8 v 0.15 v 3.2 8.6 v cc = 2.5 v 0.2 v 1.5 4.4 t pd a y ? 40 c to 85 c ns v cc = 3.3 v 0.3 v 1.4 4.1 v cc = 5 v 0.5 v 1 3.2 v cc = 1.8 v 0.15 v 3.2 9.6 v cc = 2.5 v 0.2 v 1.5 4.9 t pd a y ? 40 c to 125 c ns v cc = 3.3 v 0.3 v 1.2 4.6 v cc = 5 v 0.5 v 1 3.7 6.7 operating characteristics t a = 25 c parameter test conditions v cc typ unit v cc = 1.8 v 14 v cc = 2.5 v 14 c pd power dissipation capacitance f = 10 mhz pf v cc = 3.3 v 15 v cc = 5 v 17 copyright ? 2001 ? 2015, texas instruments incorporated submit documentation feedback 5 product folder links: sn74lvc2g34
sn74lvc2g34 sces359j ? august 2001 ? revised october 2015 www.ti.com 6.8 typical characteristics figure 1. tpd across temperature at 3.3-v v cc 6 submit documentation feedback copyright ? 2001 ? 2015, texas instruments incorporated product folder links: sn74lvc2g34 temperature - c tpd - ns -100 -50 0 50 100 150 0 0.5 1 1.5 2 2.5 d001 tpd
sn74lvc2g34 www.ti.com sces359j ? august 2001 ? revised october 2015 7 parameter measurement information figure 2. load circuit and voltage waveforms copyright ? 2001 ? 2015, texas instruments incorporated submit documentation feedback 7 product folder links: sn74lvc2g34 t h t su from output under test c (see note a) l load circuit s1 v load open gnd r l data input timing input 0 v0 v 0 v t w input 0 v input output waveform 1 s1 at v (see note b) load output waveform 2 s1 at gnd (see note b) v ol v oh 0 v? 0 v outputoutput test s1 t /t plh phl open output control v m v m v m v m v m 1.8 v 0.15 v 2.5 v 0.2 v 3.3 v 0.3 v 5 v 0.5 v 1 k w 500 w 500 w 500 w v cc r l 2 v cc 2 v cc 6 v 2 v cc v load c l 30 pf30 pf 50 pf 50 pf 0.15 v0.15 v 0.3 v0.3 v v d 3 v v i v cc /2 v cc /2 1.5 v v cc /2 v m 2 ns 2 ns 2.5 ns 2.5 ns inputs r l t /t r f v cc v cc v cc v load t /t plz pzl gnd t /t phz pzh voltage waveforms enable and disable times low- and high-level enabling voltage waveforms propagation delay times inverting and noninverting outputs notes: a. c includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z = 50 . d. the outputs are measured one at a time, with one transition per measurement. e. t and t are the same as t . f. t and t are the same as t . g. t and t are the same as t . h. all parameters and waveforms are not applicable to all devices. l o plz phz dis pzl pzh en plh phl pd w voltage waveforms pulse duration voltage waveforms setup and hold times v i v i v i v m v m v /2 load t pzl t plz t phz t pzh v C v oh d v + v ol d v m v m v m v m v ol v oh v i v i v oh v ol v m v m v m v m t plh t phl t plh t phl
sn74lvc2g34 sces359j ? august 2001 ? revised october 2015 www.ti.com 8 detailed description 8.1 overview the sn74lvc2g34 device contains two buffer gates that each perform the boolean function y = a. this device is fully specified for partial-power-down applications using i off . the i off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. 8.2 functional block diagram 8.3 feature description the sn74lvc2g34 device has a wider operating voltage range, operating from 1.65 v to 5.5 v, and allows down voltage translation. the sn74lvc2g34 i off feature allows voltages on the inputs and outputs when v cc is 0 v. 8.4 device functional modes table 1 lists the functional modes of the sn74lvc2g34. table 1. function table input output a y h h l l 8 submit documentation feedback copyright ? 2001 ? 2015, texas instruments incorporated product folder links: sn74lvc2g34 1a 1y 1 6 2a 2y 3 4
sn74lvc2g34 www.ti.com sces359j ? august 2001 ? revised october 2015 9 application and implementation 9.1 application information the sn74lvc2g34 is a high-drive cmos device that can be used as a buffer with a high output drive, such as an led application. it can produce 24 ma of drive current at 3.3 v, making it ideal for driving multiple outputs and good for high-speed applications up to 100 mhz. the inputs are 5.5-v tolerant allowing it to translate down to v cc . 9.2 typical application figure 3. typical application 9.2.1 design requirements this device uses cmos technology and has balanced output drive. take care to avoid bus contention because it can drive currents that would exceed maximum limits. the high drive will also create fast edges into light loads so routing and load conditions must be considered to prevent ringing. 9.2.2 detailed design procedure 1. recommended input conditions ? rise time and fall time specs. see ( t/ v) in the recommended operating conditions table. ? specified high and low levels. see (v ih and v il ) in the recommended operating conditions table. ? inputs are overvoltage tolerant allowing them to go as high as (vi max) in the recommended operating conditions table at any valid v cc . 2. recommended output conditions ? load currents must not exceed (i o max) per output and must not exceed (continuous current through v cc or gnd) total current for the part. these limits are located in the recommended operating conditions table. ? outputs much not be pulled above v cc under normal operating conditions. copyright ? 2001 ? 2015, texas instruments incorporated submit documentation feedback 9 product folder links: sn74lvc2g34 sn74lvc2g34 sn74lvc2g34 buffer function basic led driver vcc vcc microcontroller or logic microcontroller or logic microcontroller or logic
sn74lvc2g34 sces359j ? august 2001 ? revised october 2015 www.ti.com typical application (continued) 9.2.3 application curve figure 4. tpd across v cc at 25 c 10 power supply recommendations the power supply can be any voltage between the minimum and maximum supply voltage rating located in the recommended operating conditions table. each v cc pin must have a good bypass capacitor to prevent power disturbance. for devices with a single supply, a 0.1- f capacitor is recommended and if there are multiple v cc pins then a 0.01- f or 0.022- f capacitor is recommended for each power pin. it is ok to parallel multiple bypass caps to reject different frequencies of noise. 0.1- f and 1- f capacitors are commonly used in parallel. the bypass capacitor must be installed as close to the power pin as possible for best results. 11 layout 11.1 layout guidelines when using multiple bit logic devices inputs must not ever float. in many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input and gate are used or only 3 of the 4 buffer gates are used. such input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. specified below are the rules that must be observed under all circumstances. all unused inputs of digital logic devices must be connected to a high or low bias to prevent them from floating. the logic level that must be applied to any particular unused input depends on the function of the device. generally they will be tied to gnd or v cc whichever make more sense or is more convenient. 11.2 layout example 10 submit documentation feedback copyright ? 2001 ? 2015, texas instruments incorporated product folder links: sn74lvc2g34 vcc - v tpd - ns 0 1 2 3 4 5 6 0 1 2 3 4 5 d002 tpd v cc unused input input output output input unused input
sn74lvc2g34 www.ti.com sces359j ? august 2001 ? revised october 2015 12 device and documentation support 12.1 documentation support 12.1.1 documentation support for related documentation, see the following: implications of slow or floating cmos inputs , scba004 12.2 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 12.3 trademarks nanofree, e2e are trademarks of texas instruments. all other trademarks are the property of their respective owners. 12.4 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 12.5 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 13 mechanical, packaging, and orderable information the following pages include mechanical packaging and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser based versions of this data sheet, refer to the left hand navigation. copyright ? 2001 ? 2015, texas instruments incorporated submit documentation feedback 11 product folder links: sn74lvc2g34
package option addendum www.ti.com 26-sep-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples sn74lvc2g34dbvr active sot-23 dbv 6 3000 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 125 (c345, c34f, c34k, c34o, c34r) sn74lvc2g34dbvre4 active sot-23 dbv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c34f, c34r) sn74lvc2g34dbvrg4 active sot-23 dbv 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c34f, c34r) sn74lvc2g34dbvt active sot-23 dbv 6 250 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 125 (c345, c34f, c34k, c34r) sn74lvc2g34dbvtg4 active sot-23 dbv 6 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c34f, c34r) sn74lvc2g34dck3 active sc70 dck 6 3000 pb-free (rohs) cu snbi level-1-260c-unlim -40 to 85 c9z sn74lvc2g34dckr active sc70 dck 6 3000 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim -40 to 125 (c95, c9f, c9k, c9 r) sn74lvc2g34dckre4 active sc70 dck 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c95, c9f, c9k, c9 r) sn74lvc2g34dckrg4 active sc70 dck 6 3000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c95, c9f, c9k, c9 r) sn74lvc2g34drlr active sot-5x3 drl 6 4000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 (c97, c9r) sn74lvc2g34yzpr active dsbga yzp 6 3000 green (rohs & no sb/br) snagcu level-1-260c-unlim -40 to 85 c9n (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement.
package option addendum www.ti.com 26-sep-2018 addendum-page 2 (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of sn74lvc2g34 : ? enhanced product: SN74LVC2G34-EP note: qualified version definitions: ? enhanced product - supports defense, aerospace and medical applications
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant sn74lvc2g34dbvr sot-23 dbv 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 sn74lvc2g34dbvr sot-23 dbv 6 3000 178.0 9.2 3.3 3.23 1.55 4.0 8.0 q3 sn74lvc2g34dbvrg4 sot-23 dbv 6 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 sn74lvc2g34dbvt sot-23 dbv 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 sn74lvc2g34dbvtg4 sot-23 dbv 6 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 q3 sn74lvc2g34dckr sc70 dck 6 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 q3 sn74lvc2g34dckr sc70 dck 6 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 q3 sn74lvc2g34dckr sc70 dck 6 3000 180.0 9.2 2.3 2.55 1.2 4.0 8.0 q3 sn74lvc2g34drlr sot-5x3 drl 6 4000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 sn74lvc2g34drlr sot-5x3 drl 6 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 q3 sn74lvc2g34yzpr dsbga yzp 6 3000 178.0 9.2 1.02 1.52 0.63 4.0 8.0 q1 package materials information www.ti.com 3-aug-2017 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) sn74lvc2g34dbvr sot-23 dbv 6 3000 180.0 180.0 18.0 sn74lvc2g34dbvr sot-23 dbv 6 3000 180.0 180.0 18.0 sn74lvc2g34dbvrg4 sot-23 dbv 6 3000 180.0 180.0 18.0 sn74lvc2g34dbvt sot-23 dbv 6 250 180.0 180.0 18.0 sn74lvc2g34dbvtg4 sot-23 dbv 6 250 180.0 180.0 18.0 sn74lvc2g34dckr sc70 dck 6 3000 180.0 180.0 18.0 sn74lvc2g34dckr sc70 dck 6 3000 180.0 180.0 18.0 sn74lvc2g34dckr sc70 dck 6 3000 205.0 200.0 33.0 sn74lvc2g34drlr sot-5x3 drl 6 4000 184.0 184.0 19.0 sn74lvc2g34drlr sot-5x3 drl 6 4000 202.0 201.0 28.0 sn74lvc2g34yzpr dsbga yzp 6 3000 220.0 220.0 35.0 package materials information www.ti.com 3-aug-2017 pack materials-page 2

www.ti.com package outline c 0.5 max 0.19 0.15 1 typ 0.5 typ 6x 0.25 0.21 0.5 typ b e a d 4219524/a 06/2014 dsbga - 0.5 mm max height yzp0006 die size ball grid array notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. nanofree tm package configuration. nanofree is a trademark of texas instruments. ball a1 corner seating plane ball typ 0.05 c b a 1 2 0.015 c a b symm symm c scale 9.000d: max = e: max = 1.418 mm, min = 0.918 mm, min = 1.358 mm0.858 mm
www.ti.com example board layout 6x ( )0.225 (0.5) typ (0.5) typ ( ) metal 0.225 0.05 max solder mask opening metal under mask ( ) solder mask opening 0.225 0.05 min 4219524/a 06/2014 dsbga - 0.5 mm max height yzp0006 die size ball grid array notes: (continued) 4. final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. for more information, see texas instruments literature number sbva017 (www.ti.com/lit/sbva017). symm symm land pattern example scale:40x 1 2 a b c non-solder mask defined (preferred) solder mask details not to scale solder mask defined
www.ti.com example stencil design (0.5) typ (0.5) typ 6x ( 0.25) (r ) typ0.05 metal typ 4219524/a 06/2014 dsbga - 0.5 mm max height yzp0006 die size ball grid array notes: (continued) 5. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. symm symm solder paste example based on 0.1 mm thick stencil scale:40x 1 2 a b c
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